general description deepcover? embedded security solutions cloak sensitive data under multiple layers of advanced physical security to provide the most secure key storage possible. the deepcover secure authenticator (ds28e22) com - bines crypto-strong, bidirectional, secure challenge- and-response authentication functionality with an imple - mentation based on the fips 180-3-specified secure hash algorithm (sha-256). a 2kb user-programmable eeprom array provides nonvolatile storage of applica - tion data and additional protected memory holds a read- protected secret for sha-256 operations and settings for user memory control. each device has its own guar - anteed unique 64-bit rom identification number (rom id) that is factory programmed into the chip. this unique rom id is used as a fundamental input parameter for cryptographic operations and also serves as an elec - tronic serial number within the application. a bidirectional security model enables two-way authentication between a host system and slave-embedded ds28e22. slave-to- host authentication is used by a host system to securely validate that an attached or embedded ds28e22 is authentic. host-to-slave authentication is used to protect ds28e22 user memory from being modified by a non - authentic host. the sha-256 message authentication code (mac), which the ds28e22 generates, is computed from data in the user memory, an on-chip secret, a host random challenge, and the 64-bit rom id. the ds28e22 communicates over the single-contact 1-wire m bus at overdrive speed. the communication follows the 1-wire protocol with the rom id acting as node address in the case of a multiple-device 1-wire network. applications authentication of network-attached appliances printer cartridge id/authentication reference design license management system intellectual property protection sensor/accessory authentication and calibration secure feature setting for configurable systems key generation and exchange for cryptographic systems features s symmetric key-based bidirectional secure authentication model based on sha-256 s dedicated hardware-accelerated sha engine for generating sha-256 macs s strong authentication with a high bit count, user- programmable secret, and input challenge s 2048 bits of user eeprom partitioned into 8 pages of 256 bits s user-programmable and irreversible eeprom protection modes including authentication, write and read protect, and otp/eprom emulation s unique, factory-programmed 64-bit identification number s single-contact 1-wire interface communicates with host at up to 76.9kbps s operating range: 3.3v 10%, -40 n c to +85 n c s low-power 5a (typ) standby s 8kv human body model esd protection (typ) s 6-pin tdfn, 6-lead tsoc packages typical application circuit 219-0020; rev 2; 12/12 ordering information appears at end of data sheet. deepcover is a trademark and 1-wire is a registered trademark of maxim integrated products, inc. for related parts and recommended products to use with this part, refer to: www.maximintegrated.com/ds28e22.related sda v cc scl slpz io r p r p = 1.1k maximum i 2 c bus capacitance 320pf 3.3v 1-wire line c (i 2 c port) ds2465 ds28e22 ds28e22 deepcover secure authenticator with 1-wire sha-256 and 2kb user eeprom evaluation kit available for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com. abridged data sheet
ds28e22 deepcover secure authenticator with 1-wire sha-256 and 2kb user eeprom 2 io voltage range to gnd ...................................... -0.5v to 4.0v io sink current ................................................................... 20ma operating temperature range ......................... -40 n c to +85 n c junction temperature ..................................................... +150 n c storage temperature range ............................ -55 n c to +125 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics ( t a = -40 n c to +85 n c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units io pin: general data 1-wire pullup voltage v pup (note 2) 2.97 3.63 v 1-wire pullup resistance r pup v pup = 3.3v q 10% (note 3) 300 1500 i input capacitance c io (notes 4, 5) 1500 pf input load current i l io pin at v pup 5 19.5 f a high-to-low switching threshold v tl (notes 6, 7) 0.65 x v pup v input low voltage v il (notes 2, 8) 0.3 v low-to-high switching threshold v th (notes 6, 9) 0.75 x v pup v switching hysteresis v hy (notes 6, 10) 0.3 v output low voltage v ol i ol = 4ma (note 11) 0.4 v recovery time t rec r pup = 1500 i (notes 2, 12) 5 f s time-slot duration t slot (notes 2, 13) 13 f s io pin: 1-wire reset, presence-detect cycle reset low time t rstl (note 2) 48 80 f s reset high time t rsth (note 14) 48 f s presence-detect sample time t msp (notes 2, 15) 8 10 f s io pin: 1-wire write write-zero low time t w0l (notes 2, 16) 8 16 f s write-one low time t w1l (notes 2, 16) 1 2 f s io pin: 1-wire read read low time t rl (notes 2, 17) 1 2 - d f s read sample time t msr (notes 2, 17) t rl + d 2 f s eeprom programming current i prog v pup = 3.63v (notes 5, 18) 1 ma programming time for a 32-bit segment or page protection t prd refer to the full data sheet. ms programming time for the secret t prs ms write/erase cycling endurance n cy t a = +85 n c (notes 21, 22) 100k data retention t dr t a = +85 n c (notes 23, 24, 25) 10 years maxim integrated abridged data sheet
ds28e22 deepcover secure authenticator with 1-wire sha-256 and 2kb user eeprom 3 electrical characteristics (continued) ( t a = -40 n c to +85 n c, unless otherwise noted.) (note 1) note 1: limits are 100% production tested at t a = +25c and/or t a = +85c. limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. typical values are not guaranteed. note 2: system requirement. note 3: maximum allowable pullup resistance is a function of the number of 1-wire devices in the system and 1-wire recovery times. the specified value here applies to systems with only one device and with the minimum 1-wire recovery times. note 4: typical value represents the internal parasite capacitance when v pup is first applied. once the parasite capacitance is charged, it does not affect normal communication. note 5: guaranteed by design and/or characterization only; not production tested. note 6: v tl , v th , and v hy are a function of the internal supply voltage, which is a function of v pup , r pup , 1-wire timing, and capacitive loading on io. lower v pup , higher r pup , shorter t rec , and heavier capacitive loading all lead to lower values of v tl , v th , and v hy . note 7: voltage below which, during a falling edge on io, a logic-zero is detected. note 8: the voltage on io must be less than or equal to v ilmax at all times when the master is driving io to a logic-zero level. note 9: voltage above which, during a rising edge on io, a logic-one is detected. note 10: after v th is crossed during a rising edge on io, the voltage on io must drop by at least v hy to be detected as logic-zero. note 11: the i-v characteristic is linear for voltages less than 1v. note 12: applies to a single device attached to a 1-wire line. note 13: defines maximum possible bit rate. equal to 1/(t w0lmin + t recmin ). note 14: an additional reset or communication sequence cannot begin until the reset high time has expired. note 15: interval after t rstl during which a bus master can read a logic 0 on io if there is a ds28e22 present. the power-up pres - ence detect pulse could be outside this interval, but will be complete within 2ms after power-up. note 16: in figure 11 represents the time required for the pullup circuitry to pull the voltage on io up from v il to v th . the actual maximum duration for the master to pull the line low is t w1lmax + t f - and t w0lmax + t f - , respectively. note 17: d in figure 11 represents the time required for the pullup circuitry to pull the voltage on io up from v il to the input-high threshold of the bus master. the actual maximum duration for the master to pull the line low is t rlmax + t f . note 18: current drawn from io during the eeprom programming interval or sha-256 computation. the pullup circuit on io during the programming interval or sha-256 computation should be such that the voltage at io is greater than or equal to 2.0v. note 19: refer to the full data sheet. note 20: refer to the full data sheet. note 21: write-cycle endurance is tested in compliance with jesd47g. note 22: not 100% production tested; guaranteed by reliability monitor sampling. note 23: data retention is tested in compliance with jesd47g. note 24: guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to the data sheet limit at operating temperature range is established by reliability testing. note 25: eeprom writes can become nonfunctional after the data retention time is exceeded. long-term storage at elevated tem - peratures is not recommended. note 26: refer to the full data sheet. parameter symbol conditions min typ max units sha-256 engine computation current i csha refer to the full data sheet. ma computation time t csha ms maxim integrated abridged data sheet
ds28e22 deepcover secure authenticator with 1-wire sha-256 and 2kb user eeprom 4 pin configuration pin description pin name function tsoc tdfn-ep 1 3 gnd ground reference 2 2 io 1-wire bus interface. open-drain signal that requires an external pullup resistor. 3, 4, 5, 6 1, 4, 5, 6 n.c. not connected ep exposed pad (tdfn only). solder evenly to the boards ground plane for proper operation. refer to application note 3273: exposed pads: a brief introduction for additional information. top view n.c. io gnd n.c. n.c. n.c. tsoc + 5 4 6 2 3 1 ds28e22 16 n.c. n.c. 25 io n.c. 34 gnd n.c. tdfn (3mm 3mm) top view ds28e22 28e22 ymrrf + ep maxim integrated abridged data sheet
maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 42 ? 2012 maxim integrated maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. ordering information package information for the latest package outline information and land patterns (foot - prints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. + denotes a lead(pb)-free/rohs-compliant package. t = tape and reel. * ep = exposed pad. note to readers: this document is an abridged version of the full data sheet. additional device information is available only in the full version of the data sheet. to request the full data sheet, go to www.maximintegrated.com/ds28e22 and click on request full data sheet . part temp range pin-package ds28e22p+ -40 c to +85 c 6 tsoc ds28e22p+t -40 c to +85 c 6 tsoc (4k pcs) ds28e22q+t -40 c to +85 c 6 tdfn-ep* (2.5k pcs) package type package code outline no. land pattern no. 6 tsoc d6+1 21-0382 90-0321 6 tdfn-ep t633+2 21-0137 90-0058 ds28e22 deepcover secure authenticator with 1-wire sha-256 and 2kb user eeprom abridged data sheet
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